238 search results - page 47 / 48 » Hierarchical Interconnect Circuit Models |
ISCA
2006
IEEE
14 years 11 months ago
2006
IEEE
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
101
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SIGOPS
2010
14 years 10 months ago
2010
Today’s Rich Internet Application (RIA) technologies such as Ajax, Flex, or Silverlight, are designed around the client-server paradigm and cannot easily take advantage of repli...
116
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ISLPED
2010
ACM
14 years 11 months ago
2010
ACM
This paper proposes a framework for (signal) interconnect power optimization at the global routing stage. In a typical design flow, the primary objective of global routing is mini...
107
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TPDS
2008
14 years 11 months ago
2008
Computational Grids potentially offer low cost, readily available, and large-scale high-performance platforms. For the parallel execution of programs, however, computational GRIDs ...
DAC
2002
ACM
16 years 17 days ago
2002
ACM
This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitive...