330 search results - page 36 / 66 » Hierarchical Parallel Simulated Annealing and Its Applicatio... |
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DCOSS
2008
Springer
14 years 11 months ago
2008
Springer
Abstract. We propose FIT, a flexible, light-weight and real-time scheduling system for wireless sensor platforms. There are three salient features of FIT. First, its two-tier hiera...
ICCS
2007
Springer
15 years 3 months ago
2007
Springer
This paper describes a preliminary cyberinfrastructure for contaminant characterization in water distribution systems and its deployment on the grid. The cyberinfrastructure consis...
HICSS
2006
IEEE
15 years 3 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
67
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GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
82
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IISWC
2008
IEEE
15 years 3 months ago
2008
IEEE
Abstract— The Intel Threading Building Blocks (TBB) runtime library [1] is a popular C++ parallelization environment [2][3] that offers a set of methods and templates for creatin...