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VLSID
2004
IEEE
112views VLSI» more  VLSID 2004»
16 years 5 months ago
Profiling Driven Computation Reuse: An Embedded Software Synthesis Technique for Energy and Performance Optimization
It has been observed that even highly optimized software programs perform "redundant" computations during their execution, due to the nature (statistics) of the values a...
Weidong Wang, Anand Raghunathan, Niraj K. Jha
159
Voted
ICDCSW
2003
IEEE
15 years 10 months ago
Toward a Security Architecture for Smart Messages: Challenges, Solutions, and Open Issues
Smart Messages (SMs) are migratory execution units used to describe distributed computations over mobile ad hoc networks of embedded systems. The main benefits provided by SMs ar...
Gang Xu, Cristian Borcea, Liviu Iftode
PVLDB
2008
74views more  PVLDB 2008»
15 years 4 months ago
Out-of-order processing: a new architecture for high-performance stream systems
Many stream-processing systems enforce an order on data streams during query evaluation to help unblock blocking operators and purge state from stateful operators. Such in-order p...
Jin Li, Kristin Tufte, Vladislav Shkapenyuk, Vassi...
IPPS
2010
IEEE
15 years 3 months ago
Hypergraph-based task-bundle scheduling towards efficiency and fairness in heterogeneous distributed systems
This paper investigates scheduling loosely coupled task-bundles in highly heterogeneous distributed systems. Two allocation quality metrics are used in pay-per-service distributed ...
Han Zhao, Xinxin Liu, Xiaolin Li
146
Voted
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 10 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...