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ISSS
1999
IEEE
131views Hardware» more  ISSS 1999»
15 years 6 months ago
Compressed Code Execution on DSP Architectures
Decreasing the program size has become an important goal in the design of embedded systems target to mass production. This problem has led to a number of efforts aimed at designin...
Paulo Centoducatte, Ricardo Pannain, Guido Araujo
EUROMICRO
1998
IEEE
15 years 6 months ago
SMP PCs: A Case Study on Cluster Computing
As commodity microprocessors and networks reach performance levels comparable to those used in massively parallel processors, clusters of symmetric multiprocessors are starting to...
Antônio Augusto Fröhlich, Wolfgang Schr...
FMCAD
1998
Springer
15 years 6 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
PG
1997
IEEE
15 years 6 months ago
Real-time virtual humans
The last few years have seen great maturationin the computation speed and control methods needed to portray 3D virtualhumanssuitableforreal interactiveapplications. We first desc...
Norman I. Badler
ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
15 years 6 months ago
An efficient procedure for the synthesis of fast self-testable controller structures
The BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for test purposes. This leads to some seri...
Sybille Hellebrand, Hans-Joachim Wunderlich