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95
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ICPP
2003
IEEE
15 years 6 months ago
Scheduling Algorithms with Bus Bandwidth Considerations for SMPs
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
Christos D. Antonopoulos, Dimitrios S. Nikolopoulo...
95
Voted
ICRA
2003
IEEE
148views Robotics» more  ICRA 2003»
15 years 6 months ago
Designing a secure and robust mobile interacting robot for the long term
This paper presents the genesis of RoboX. This tour guide robot has been built from the scratch based on the experience of the Autonomous Systems Lab. The production of 11 of thos...
Nicola Tomatis, Gregoire Terrien, Ralph Piguet, Da...
109
Voted
RTAS
2003
IEEE
15 years 6 months ago
Analysis of the Execution Time Unpredictability caused by Dynamic Branch Prediction
This paper investigates how dynamic branch prediction in a microprocessor affects the predictability of execution time for software running on that processor. By means of experim...
Jakob Engblom
95
Voted
CASES
2003
ACM
15 years 6 months ago
Reducing code size with echo instructions
In an embedded system, the cost of storing a program onchip can be as high as the cost of a microprocessor. Compressing an application’s code to reduce the amount of memory requ...
Jeremy Lau, Stefan Schoenmackers, Timothy Sherwood...
85
Voted
EUROPAR
2001
Springer
15 years 5 months ago
VIA Communication Performance on a Gigabit Ethernet Cluster
As the technology for high-speed networks has evolved over the last decade, the interconnection of commodity computers (e.g., PCs and workstations) at gigabit rates has become a re...
Mark Baker, Paul A. Farrell, Hong Ong, Stephen L. ...