34 search results - page 4 / 7 » High Density Through Silicon Via (TSV) |
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Pre-bond testing of 3D stacked ICs involves testing individual dies before bonding. The overall yield of 3D ICs improves with prebond testability because designers can avoid stack...
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
177
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DAC
2011
ACM
13 years 9 months ago
2011
ACM
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
CORR
2008
Springer
14 years 9 months ago
2008
Springer
Abstract-Two dimensional (2D) integration has been the traditional approach for IC integration. Increasing demands for providing electronic devices with superior performance and fu...
131
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JMLR
2010
14 years 4 months ago
2010
Estimating the conditional mean of an inputoutput relation is the goal of regression. However, regression analysis is not sufficiently informative if the conditional distribution ...