88 search results - page 5 / 18 » High Level Synthesis from Sim-nML Processor Models |
138
Voted
DSN
2004
IEEE
15 years 8 months ago
2004
IEEE
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
156
Voted
CODES
2006
IEEE
15 years 11 months ago
2006
IEEE
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
161
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CODES
2007
IEEE
15 years 11 months ago
2007
IEEE
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
179
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SASP
2008
IEEE
15 years 11 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
153
Voted
ISPD
1999
ACM
15 years 9 months ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...