249 search results - page 13 / 50 » High Level Synthesis of Timed Asynchronous Circuits |
108
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ASYNC
2007
IEEE
15 years 10 months ago
2007
IEEE
On-chip high-bandwidth sampling circuits supplement traditional test and debug techniques by non-invasively probing analog voltages for off-chip measurement. Existing circuits rel...
134
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CORR
2006
Springer
15 years 3 months ago
2006
Springer
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
141
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ISPD
1999
ACM
15 years 8 months ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
129
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ISQED
2007
IEEE
15 years 10 months ago
2007
IEEE
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
138
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ACSD
2010
IEEE
15 years 1 months ago
2010
IEEE
Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic can be complex and expensive. This pape...