2852 search results - page 108 / 571 » High Performance Architectures and Compilers |
125
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VECPAR
2004
Springer
15 years 8 months ago
2004
Springer
In this work we investigate how the compiler technique of message strip mining performs in practice on contemporary high performance networks. Message strip mining attempts to redu...
107
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CLUSTER
2003
IEEE
15 years 8 months ago
2003
IEEE
The use of a cluster for distributed performance analysis of parallel trace data is discussed. We propose an analysis architecture that uses multiple cluster nodes as a server to ...
126
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HPCA
1997
IEEE
15 years 7 months ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
104
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PPPJ
2004
ACM
15 years 8 months ago
2004
ACM
A new acceleration technology for Java embedded virtual machines is presented in this paper. Based on the selective dynamic compilation technique, this technology addresses the J2...
116
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DATE
2003
IEEE
15 years 8 months ago
2003
IEEE
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...