2852 search results - page 10 / 571 » High Performance Architectures and Compilers |
ICPPW
2006
IEEE
15 years 3 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
IEEEPACT
2003
IEEE
15 years 3 months ago
2003
IEEE
Effective modeling and management of hardware resources have always been critical toward generating highly efficient code in static compilers. With Just-In-Time compilation and dy...
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ISICT
2004
14 years 11 months ago
2004
The IPACS-project (Integrated Performance Analysis of Computer Systems) was founded by the Federal Department of Education, Science, Research and Technology (BMBF) in the program ...
PPOPP
2010
ACM
15 years 4 months ago
2010
ACM
This paper presents an analytical model to predict the performance of general-purpose applications on a GPU architecture. The model is designed to provide performance information ...
CASES
2004
ACM
15 years 3 months ago
2004
ACM
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...