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ASPLOS
1998
ACM
15 years 7 months ago
A Cost-Effective, High-Bandwidth Storage Architecture
This paper describes the Network-Attached Secure Disk (NASD) storage architecture, prototype implementations of NASD drives, array management for our architecture, and three files...
Garth A. Gibson, David Nagle, Khalil Amiri, Jeff B...
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
15 years 8 months ago
A High Throughput String Matching Architecture for Intrusion Detection and Prevention
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...
Lin Tan, Timothy Sherwood
SAMOS
2010
Springer
15 years 1 months ago
CLI-based compilation flows for the C language
Abstract--Embedded systems contain a wide variety of processors. Economical and technological factors favor systems made of a combination of diverse but programmable processors. So...
Erven Rohou, Andrea C. Ornstein, Marco Cornero
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
15 years 9 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
JUCS
2007
102views more  JUCS 2007»
15 years 3 months ago
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
Oscar Pérez, Yves Berviller, Camel Tanougas...