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SIGCOMM
2010
ACM
15 years 3 months ago
Architecture optimisation with Currawong
We describe Currawong, a tool to perform system software architecture optimisation. Currawong is an extensible tool which applies optimisations at the point where an application i...
Nicholas Fitzroy-Dale, Ihor Kuz, Gernot Heiser
155
Voted
ISCAS
2008
IEEE
287views Hardware» more  ISCAS 2008»
15 years 9 months ago
A high speed word level finite field multiplier using reordered normal basis
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmad...
DELTA
2010
IEEE
15 years 8 months ago
Algorithm Transformation for FPGA Implementation
— High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Donald G. Bailey, Christopher T. Johnston
IPPS
2003
IEEE
15 years 8 months ago
A Compilation Framework for Distributed Memory Parallelization of Data Mining Algorithms
With the availability of large datasets in a variety of scientific and commercial domains, data mining has emerged as an important area within the last decade. Data mining techni...
Xiaogang Li, Ruoming Jin, Gagan Agrawal
ECSQARU
1997
Springer
15 years 7 months ago
Fast-Division Architecture for Dempster-Shafer Belief Functions
Given a number of Dempster-Shafer belief functions there are different architectures which allow to do a compilation of the given knowledge. These architectures are the Shenoy-Sha...
R. Bissig, Jürg Kohlas, Norbert Lehmann