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» High Performance Architectures and Compilers
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MICRO
1997
IEEE
110views Hardware» more  MICRO 1997»
15 years 7 months ago
The Design and Performance of a Conflict-Avoiding Cache
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
Nigel P. Topham, Antonio González, Jos&eacu...
JVM
2004
103views Education» more  JVM 2004»
15 years 4 months ago
The Virtual Processor: Fast, Architecture-Neutral Dynamic Code Generation
Tools supporting dynamic code generation tend too be low-level (leaving much work to the client application) or too intimately related with the language/system in which they are u...
Ian Piumarta
ISCA
1995
IEEE
92views Hardware» more  ISCA 1995»
15 years 6 months ago
A Comparison of Full and Partial Predicated Execution Support for ILP Processors
One can e ectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential bene ts of predicated execution are hig...
Scott A. Mahlke, Richard E. Hank, James E. McCormi...
ICIP
2000
IEEE
16 years 4 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
FPL
2010
Springer
134views Hardware» more  FPL 2010»
15 years 1 months ago
GPU Versus FPGA for High Productivity Computing
Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems (HPCS). In this work the performance of a GPU based HPCS is c...
David Huw Jones, Adam Powell, Christos-Savvas Boug...