2852 search results - page 133 / 571 » High Performance Architectures and Compilers |
146
Voted
ICCD
2000
IEEE
2000
IEEE
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
15 years 7 months ago
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
124
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IEEEPACT
2006
IEEE
15 years 9 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
138
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ASAP
2000
IEEE
15 years 7 months ago
2000
IEEE
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
134
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ISCA
2010
IEEE
15 years 6 months ago
2010
IEEE
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
111
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ASAP
2006
IEEE
15 years 9 months ago
2006
IEEE
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of...