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» High Performance Architectures and Compilers
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ERSA
2008
145views Hardware» more  ERSA 2008»
15 years 4 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
132
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ICSE
2008
IEEE-ACM
16 years 3 months ago
Exploiting connector knowledge to efficiently disseminate highly voluminous data sets
Ever-growing amounts of data that must be distributed from data providers to consumers across the world necessitate a greater understanding of the software architectural implicati...
Chris Mattmann, David Woollard, Nenad Medvidovic
107
Voted
DAC
2008
ACM
16 years 4 months ago
A power and temperature aware DRAM architecture
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Mem...
NSDI
2008
15 years 5 months ago
Swift: A Fast Dynamic Packet Filter
This paper presents Swift, a packet filter for high performance packet capture on commercial off-the-shelf hardware. The key features of Swift include (1) extremely low filter upd...
Zhenyu Wu, Mengjun Xie, Haining Wang
115
Voted
ISPASS
2007
IEEE
15 years 9 months ago
Cross Binary Simulation Points
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jal...