2852 search results - page 144 / 571 » High Performance Architectures and Compilers |
139
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DAC
2002
ACM
16 years 4 months ago
2002
ACM
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
181
Voted
VLSID
2007
IEEE
16 years 3 months ago
2007
IEEE
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
117
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SAC
2006
ACM
15 years 3 months ago
2006
ACM
The second-class formulation of generics in Java 5.0 discards generic type information during compilation. As a result, Java 5.0 prohibits run-time type-dependent operations, gene...
116
Voted
CASES
2008
ACM
15 years 5 months ago
2008
ACM
In this paper, we introduce Optimus: an optimizing synthesis compiler for streaming applications. Optimus compiles programs written in a high level streaming language to either so...
121
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ISCA
2000
IEEE
15 years 7 months ago
2000
IEEE
Trends in VLSI technology scaling demand that future computing devices be narrowly focused to achieve high performance and high efficiency, yet also target the high volumes and lo...