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104
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ICS
1999
Tsinghua U.
15 years 7 months ago
Low-level router design and its impact on supercomputer system performance
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
Valentin Puente, José A. Gregorio, Cruz Izu...
127
Voted
EUROPAR
1997
Springer
15 years 7 months ago
Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
Edward D. Moreno, Sergio Takeo Kofuji, Marcelo H. ...
108
Voted
EURODAC
1995
IEEE
180views VHDL» more  EURODAC 1995»
15 years 7 months ago
Integration of VHDL into a system design environment
Verification of image processing systems is mainly done on the basis of image sequence simulations. To achieve high simulation efficiency, our compiled code simulator MSIPC offers...
Ludwig Schwoerer, Matthias Lück, Hartmut Schr...
107
Voted
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
15 years 9 months ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
GLOBECOM
2009
IEEE
15 years 10 months ago
From Trees to DAGs: Improving the Performance of Bridged Ethernet Networks
—Ethernet is widely used in Local Area Networks (LANs) due to its simplicity and cost effectiveness. Today, a great deal of effort is being devoted to extending Ethernet capabili...
Chen Avin, Ran Giladi, Nissan Lev-Tov, Zvi Lotker