Sciweavers

2852 search results - page 174 / 571
» High Performance Architectures and Compilers
Sort
View
142
Voted
ACSC
2004
IEEE
15 years 7 months ago
A RMI Protocol for Aglets
Aglets is a mobile agent system that allows an agent to move with its code and execution state across the network to interact with other entities. Aglets utilizes Java RMI to supp...
Feng Lu, Kris Bubendorfer
95
Voted
GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
15 years 8 months ago
A novel 32-bit scalable multiplier architecture
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
Yeshwant Kolla, Yong-Bin Kim, John Carter
ASPLOS
2006
ACM
15 years 9 months ago
Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance
Redundant threading architectures duplicate all instructions to detect and possibly recover from transient faults. Several lighter weight Partial Redundant Threading (PRT) archite...
Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasa...
170
Voted
IEEEPACT
2005
IEEE
15 years 9 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
107
Voted
ICASSP
2008
IEEE
15 years 10 months ago
Nonlinear residual acoustic echo suppression for high levels of harmonic distortion
Linear adaptive filters are often used for Acoustic Echo Cancellation (AEC) but sometimes fail to perform well in notebook computers and inexpensive telephony devices. Low-qualit...
Diego A. Bendersky, Jack W. Stokes, Henrique S. Ma...