2852 search results - page 177 / 571 » High Performance Architectures and Compilers |
139
Voted
ASPLOS
2012
ACM
13 years 11 months ago
2012
ACM
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
121
Voted
ICPP
2007
IEEE
15 years 9 months ago
2007
IEEE
As multi-core microprocessors are becoming widely adopted, the need to extract thread-level parallelism (TLP) from single-threaded applications in a seamless fashion increases. In...
112
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ISCAS
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract— NnSP is a stream-based programmable and codelevel statically reconfigurable processor for realization of neural networks in embedded systems. NnSP is provided with a n...
141
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CGO
2003
IEEE
15 years 8 months ago
2003
IEEE
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative...
148
Voted
RSP
1999
IEEE
15 years 7 months ago
1999
IEEE
The advances in the programmable hardware has lead to new architectures where the hardware can be dynamically adapted to the application to gain better performance. There are stil...