2852 search results - page 219 / 571 » High Performance Architectures and Compilers |
123
Voted
IEEEPACT
2009
IEEE
15 years 10 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
117
Voted
IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
127
Voted
PLDI
2003
ACM
15 years 9 months ago
2003
ACM
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
161
Voted
DAC
2009
ACM
15 years 8 months ago
2009
ACM
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
149
Voted
IFIP
1998
Springer
15 years 8 months ago
1998
Springer
This paper presents a hybrid approach to automatic parallelization of computer programs which combines static extraction of threads (tasks) with dynamic scheduling for parallel an...