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LCTRTS
2005
Springer
15 years 9 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
CASES
2005
ACM
15 years 5 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
15 years 9 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
EXPCS
2007
15 years 7 months ago
Introducing entropies for representing program behavior and branch predictor performance
Predictors are inherent components of state-of-the-art microprocessors. Branch predictors are discussed actively from diverse perspectives. Performance of a branch predictor large...
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
HOTI
2005
IEEE
15 years 9 months ago
Performance Characterization of a 10-Gigabit Ethernet TOE
Though traditional Ethernet based network architectures such as Gigabit Ethernet have suffered from a huge performance difference as compared to other high performance networks (e...
Wu-chun Feng, Pavan Balaji, C. Baron, Laxmi N. Bhu...