2852 search results - page 223 / 571 » High Performance Architectures and Compilers |
156
Voted
EH
2004
IEEE
15 years 7 months ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
152
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WMPI
2004
ACM
15 years 9 months ago
2004
ACM
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
103
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FPL
2009
Springer
15 years 8 months ago
2009
Springer
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
136
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IPPS
2002
IEEE
15 years 8 months ago
2002
IEEE
Distributed Computing, the exploitation of idle cycles on pervasive desktop PC systems offers the opportunity to increase the available computing power by orders of magnitude (10x...
143
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VEE
2005
ACM
15 years 9 months ago
2005
ACM
Virtual machines (VMs) are commonly used to distribute programs in an architecture-neutral format, which can easily be interpreted or compiled. A long-running question in the desi...