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VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
16 years 4 months ago
Address Code and Arithmetic Optimizations for Embedded Systems
An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive computations on large data sets. These data sets get to be ...
J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, M...
133
Voted
ANCS
2007
ACM
15 years 7 months ago
Frame-aggregated concurrent matching switch
Network operators need high-capacity router architectures that can offer scalability, provide throughput and performance guarantees, and maintain packet ordering. However, previou...
Bill Lin, Isaac Keslassy
151
Voted
IWCMC
2006
ACM
15 years 9 months ago
Cross-layer performance analysis of joint rate and power adaptation schemes with multiple-user contention in Nakagami fading cha
Adaptively adjusting transmission rate and power to concurrently enhance goodput and save energy is an important issue in the wireless local area network (WLAN). However, goodput ...
Li-Chun Wang, Kuang-Nan Yen, Jane-Hwa Huang, Ander...
163
Voted
CISIS
2009
IEEE
15 years 10 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
143
Voted
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
15 years 8 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden