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DATE
2007
IEEE
185views Hardware» more  DATE 2007»
15 years 10 months ago
An ILP formulation for system-level application mapping on network processor architectures
Current day network processors incorporate several architectural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to suppor...
Christopher Ostler, Karam S. Chatha
HPCN
1995
Springer
15 years 7 months ago
Mermaid: modelling and evaluation research in MIMD architecture design
The Mermaid project focuses on the construction of simulation models for MIMD multi-computers in order to evaluate them and to give estimates of the system’s performance. A multi...
Andy D. Pimentel, J. van Brummen, T. Papathanassia...
ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
15 years 5 months ago
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks
– We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA HighSpeed Bus (AHB). The architecture features multiple low-area flyby DMA bloc...
Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioann...
NETWORKING
2004
15 years 5 months ago
Comparative Evaluation of Two Scalable QoS Architectures
This paper performs a comparative evaluation of two QoS architectures, RSVP Reservation Aggregation and Scalable ReservationBased QoS, aimed at providing QoS levels similar to the ...
Rui Prior, Susana Sargento, Pedro Brandão, ...
HPCA
2001
IEEE
16 years 4 months ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas