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SLIP
2003
ACM
15 years 9 months ago
A hierarchical three-way interconnect architecture for hexagonal processors
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...
ACSC
2008
IEEE
15 years 10 months ago
A Local Broker enabled MobiPass architecture for enhancing trusted interaction efficiency
While mobile computing provides a potentially vast business opportunity for many industry participants, it also raises issues such as security and performance. This paper proposes...
Will Tao, Robert Steele
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
16 years 4 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
IPPS
2006
IEEE
15 years 10 months ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
149
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ITNG
2007
IEEE
15 years 10 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh