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TRIDENTCOM
2008
IEEE
15 years 10 months ago
A 3GPP system architecture evolution virtualized experimentation infrastructure for mobility prototyping
The 3GPP System Architecture Evolution (SAE) is a very attractive environment from the service provisioning perspective, thanks to the variety of access technologies and mobility ...
Miguel Gómez Rodríguez, Fermí...
AINA
2007
IEEE
15 years 10 months ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...
IPPS
2002
IEEE
15 years 8 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ISCA
1998
IEEE
104views Hardware» more  ISCA 1998»
15 years 8 months ago
Selective Eager Execution on the PolyPath Architecture
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
Artur Klauser, Abhijit Paithankar, Dirk Grunwald
151
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CLUSTER
2001
IEEE
15 years 7 months ago
SOVIA: A User-level Sockets Layer Over Virtual Interface Architecture
The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directlyaccessible i...
Jin-Soo Kim, Kangho Kim, Sung-In Jung