2852 search results - page 241 / 571 » High Performance Architectures and Compilers |
140
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TJS
2010
14 years 10 months ago
2010
The Sort operation is a core part of many critical applications. Despite the large efforts to parallelize it, the fact that it suffers from high data-dependencies vastly limits it...
135
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ISCA
2011
IEEE
14 years 7 months ago
2011
IEEE
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
162
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ICIP
2007
IEEE
2007
IEEE
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
16 years 5 months ago
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
145
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CSE
2009
IEEE
15 years 7 months ago
2009
IEEE
Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architectur...
138
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HPCA
2003
IEEE
16 years 4 months ago
2003
IEEE
This paper identifies node affinity as an important property for scalable general-purpose locks. Nonuniform communication architectures (NUCAs), for example CCNUMAs built from a f...