2852 search results - page 246 / 571 » High Performance Architectures and Compilers |
166
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ISLPED
2010
ACM
15 years 4 months ago
2010
ACM
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
152
Voted
TPDS
2010
15 years 2 months ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
117
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ICONIP
2008
15 years 5 months ago
2008
This paper presents a novel and notable swarm approach to evolve an optimal set of weights and architecture of a neural network for classification in data mining. In a distributed ...
149
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IPPS
1998
IEEE
15 years 8 months ago
1998
IEEE
Thread migration is established as a mechanism for achieving dynamic load sharing. However, fine-grained migration has not been used due to the high thread and messaging overheads...
104
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ICCD
2003
IEEE
16 years 26 days ago
2003
IEEE
We present a methodology for a power-optimized, software-controlled Translation Lookaside Buffer (TLB) organization. A highly reduced number of Virtual Page Number (VPN) bits sufï...