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MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 8 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
CF
2011
ACM
14 years 3 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
CCGRID
2001
IEEE
15 years 7 months ago
XtremWeb: A Generic Global Computing System
Global Computing achieves high throughput computing by harvesting a very large number of unused computing resources connected to the Internet. This parallel computing model target...
Gilles Fedak, Cécile Germain, Vincent N&eac...
HPCA
2008
IEEE
16 years 4 months ago
Branch-mispredict level parallelism (BLP) for control independence
A microprocessor's performance is fundamentally limited by the rate at which it can resolve branch mispredictions. Control independence (CI) architectures look for useful con...
Kshitiz Malik, Mayank Agarwal, Sam S. Stone, Kevin...
CCGRID
2001
IEEE
15 years 7 months ago
OVM: Out-of-Order Execution Parallel Virtual Machine
High performance computing on parallel architectures currently uses different approaches depending on the hardory model of the architecture, the abstraction level of the programmi...
George Bosilca, Gilles Fedak, Franck Cappello