Sciweavers

2852 search results - page 265 / 571
» High Performance Architectures and Compilers
Sort
View
EMSOFT
2008
Springer
15 years 5 months ago
A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems
NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is...
Jin Kyu Kim, Hyung Gyu Lee, Shinho Choi, Kyoung Il...
176
Voted
INFSOF
2011
176views more  INFSOF 2011»
14 years 11 months ago
Testing in Service Oriented Architectures with dynamic binding: A mapping study
Context: Service Oriented Architectures (SOA) have emerged as a new paradigm to develop interoperable and highly dynamic applications. Objective: This paper aims to identify the s...
Marcos Palacios, José García-Fanjul,...
CORR
2006
Springer
103views Education» more  CORR 2006»
15 years 4 months ago
VXA: A Virtual Architecture for Durable Compressed Archives
Data compression algorithms change frequently, and obsolete decoders do not always run on new hardware and operating systems, threatening the long-term usability of content archiv...
Bryan Ford
NCA
2003
IEEE
15 years 9 months ago
Kernel-based Web switches providing content-aware routing
Locally distributed Web server systems represent a costeffective solution to the performance problems due to high traffic volumes reaching popular Web sites. In this paper, we fo...
Mauro Andreolini, Michele Colajanni, Marcello Nucc...
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
15 years 10 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...