2852 search results - page 269 / 571 » High Performance Architectures and Compilers |
140
click to vote
MKWI
2008
15 years 5 months ago
2008
: To provide effective support, process-aware information systems (PAIS) must not freeze existing business processes. Instead they should enable authorized users to deviate on-the-...
137
click to vote
WICSA
2004
15 years 5 months ago
2004
Research domains such as active networks, ad-hoc networks, ubiquitous computing, pervasive computing, grid computing, and sensor networks, clearly show that computer networks will...
125
click to vote
ISCA
2000
IEEE
15 years 8 months ago
2000
IEEE
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
142
click to vote
FAST
2008
2008
Enhancing Storage System Availability on Multi-Core Architectures with Recovery-Conscious Scheduling
15 years 5 months ago
In this paper we develop a recovery conscious framework for multi-core architectures and a suite of techniques for improving the resiliency and recovery efficiency of highly conc...
121
click to vote
MICRO
2007
IEEE
15 years 10 months ago
2007
IEEE
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...