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» High Performance Architectures and Compilers
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HPDC
2008
IEEE
15 years 10 months ago
Harmony: an execution model and runtime for heterogeneous many core systems
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...
Gregory F. Diamos, Sudhakar Yalamanchili
ANCS
2005
ACM
15 years 9 months ago
High-throughput linked-pattern matching for intrusion detection systems
This paper presents a hardware architecture for highly efficient intrusion detection systems. In addition, a software tool for automatically generating the hardware is presented....
Zachary K. Baker, Viktor K. Prasanna
ASPDAC
2006
ACM
143views Hardware» more  ASPDAC 2006»
15 years 10 months ago
Constraint-driven bus matrix synthesis for MPSoC
– Modern multi-processor system-on-chip (MPSoC) designs have high bandwidth constraints which must be satisfied by the underlying communication architecture. Bus matrix based com...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
PPOPP
2003
ACM
15 years 9 months ago
Programming the FlexRAM parallel intelligent memory system
In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. The result is a highly-parallel, heterogeneous machine that is able t...
Basilio B. Fraguela, Jose Renau, Paul Feautrier, D...
ACSAC
2009
IEEE
15 years 8 months ago
Justifying Integrity Using a Virtual Machine Verifier
Emerging distributed computing architectures, such as grid and cloud computing, depend on the high integrity execution of each system in the computation. While integrity measuremen...
Joshua Schiffman, Thomas Moyer, Christopher Shal, ...