Sciweavers

2852 search results - page 283 / 571
» High Performance Architectures and Compilers
Sort
View
EIT
2008
IEEE
15 years 10 months ago
Architectural support for securing application data in embedded systems
—The rapid growth and pervasive use of embedded systems makes it easier for an adversary to gain physical access to these devices to launch attacks and reverse engineer of the sy...
Olga Gelbart, Eugen Leontie, Bhagirath Narahari, R...
161
Voted
PPL
2008
185views more  PPL 2008»
15 years 4 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
DAC
2004
ACM
16 years 5 months ago
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik...
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 10 months ago
Networks on chips for high-end consumer-electronics TV system architectures
Consumer electronics products, such as high-end (digital) TVs, contain complex systems on chip (SOC) that offer high computational performance at low cost. Traditionally, these SO...
Frits Steenhof, Harry Duque, Björn Nilsson, K...
138
Voted
IPPS
2006
IEEE
15 years 10 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...