2852 search results - page 292 / 571 » High Performance Architectures and Compilers |
149
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HIPEAC
2009
Springer
15 years 8 months ago
2009
Springer
Abstract. On multi-core architectures with software-managed memories, effectively orchestrating data movement is essential to performance, but is tedious and error-prone. In this p...
124
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ML
2002
ACM
15 years 3 months ago
2002
ACM
The execution order of a block of computer instructions on a pipelined machine can make a difference in running time by a factor of two or more. Compilers use heuristic schedulers...
115
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DAC
1999
ACM
16 years 5 months ago
1999
ACM
? The economic viability of the reusable core-based design paradigm depends on the development of techniques for intellectual property protection. We introduce the first dynamic wa...
164
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DAC
2003
ACM
16 years 5 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
127
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ICCAD
2001
IEEE
16 years 1 months ago
2001
IEEE
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...