2852 search results - page 311 / 571 » High Performance Architectures and Compilers |
143
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TCAD
2008
15 years 4 months ago
2008
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
139
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TCAD
2008
15 years 4 months ago
2008
Embedded systems are constrained by the available memory. Code-compression techniques address this issue by reducing the code size of application programs. It is a major challenge ...
131
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SIGSOFT
2010
ACM
15 years 2 months ago
2010
ACM
Most software tools and environments help developers analyze the present and past development states of their software systems. Few approaches have investigated the potential cons...
145
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VLSID
2002
IEEE
16 years 4 months ago
2002
IEEE
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
142
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FCCM
2002
IEEE
15 years 9 months ago
2002
IEEE
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...