2852 search results - page 342 / 571 » High Performance Architectures and Compilers |
190
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BSDCON
2003
15 years 6 months ago
2003
The existing thread scheduler in FreeBSD was well suited towards the computing environment that it was developed in. As the priorities and hardware targets of the project have cha...
174
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PC
2007
15 years 4 months ago
2007
We explore runtime mechanisms and policies for scheduling dynamic multi-grain parallelism on heterogeneous multi-core processors. Heterogeneous multi-core processors integrate con...
133
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MSS
1999
IEEE
15 years 8 months ago
1999
IEEE
Recently TRW fielded a prototype system for a government customer. It provides a wide range of capabilities including data collection, hierarchical storage, automated distribution...
137
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ANCS
2010
ACM
15 years 2 months ago
2010
ACM
This paper discusses the architecture and performance studies of Datacenter Optical Switch (DOS) designed for scalable and highthroughput interconnections within a data center. DO...
136
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IEEEPACT
2005
IEEE
15 years 10 months ago
2005
IEEE
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...