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ICESS
2007
Springer
15 years 10 months ago
A Design Method for Heterogeneous Adders
The performance of existing adders varies widely in their speed and area requirements, which in turn sometimes makes designers pay a high cost in area especially when the delay req...
Jeong-Gun Lee, Jeong-A. Lee, Byeong-Seok Lee, Milo...
116
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FPGA
2005
ACM
137views FPGA» more  FPGA 2005»
15 years 10 months ago
HARP: hard-wired routing pattern FPGAs
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
ISCAS
2003
IEEE
89views Hardware» more  ISCAS 2003»
15 years 10 months ago
DCT-based video frame-skipping transcoder
Due to high computational complexity and quality degradation introduced by conventional frame-skipping transcoders, a DCT-based video frame-skipping transcoder is proposed recentl...
Kai-Tat Fung, Wan-Chi Siu
DSN
2008
IEEE
15 years 6 months ago
Enhanced server fault-tolerance for improved user experience
Interactive applications such as email, calendar, and maps are migrating from local desktop machines to data centers due to the many advantages offered by such a computing environ...
Manish Marwah, Shivakant Mishra, Christof Fetzer
MAM
2007
113views more  MAM 2007»
15 years 4 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...