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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 10 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
OTM
2005
Springer
15 years 10 months ago
Optimization of Distributed Queries in Grid Via Caching
Abstract. Caching can highly improve performance of query processing in distributed databases. In this paper we show how this technique can be used in grid architecture where data ...
Piotr Cybula, Hanna Kozankiewicz, Krzysztof Stence...
124
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WMPI
2004
ACM
15 years 10 months ago
Evaluating kilo-instruction multiprocessors
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...
Marco Galluzzi, Ramón Beivide, Valentin Pue...
DAC
2000
ACM
15 years 9 months ago
Macro-driven circuit design methodology for high-performance datapaths
Datapath design is one of the most critical elements in the design of a high performance microprocessor. However datapath design is typically done manually, and is often custom st...
Mahadevamurty Nemani, Vivek Tiwari
DAC
1999
ACM
15 years 9 months ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...