2852 search results - page 379 / 571 » High Performance Architectures and Compilers |
107
click to vote
PADS
2003
ACM
15 years 10 months ago
2003
ACM
Federated simulation interfaces such as the High Level Architecture (HLA) were designed for interoperability, and as such are not traditionally associated with highperformance com...
118
click to vote
ICIP
2009
IEEE
16 years 5 months ago
2009
IEEE
Wyner-Ziv (WZ) coding of video utilizes simple encoders and highly complex decoders. A transcoder from a WZ codec to a traditional codec can potentially increase the range of appl...
103
click to vote
ISCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...
165
click to vote
ICRA
1999
IEEE
15 years 9 months ago
1999
IEEE
Service robots which should perform human-like operation will penetrate into a great number of applications in the future. Requirements for this is high flexibility, autonomy and ...
143
click to vote
HPCA
1996
IEEE
15 years 9 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...