2852 search results - page 391 / 571 » High Performance Architectures and Compilers |
146
Voted
DAC
1999
ACM
15 years 9 months ago
1999
ACM
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
141
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ISSS
1998
IEEE
15 years 9 months ago
1998
IEEE
This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programm...
152
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ANTSW
2006
Springer
15 years 8 months ago
2006
Springer
Abstract. Mobile ad hoc networks are a class of highly dynamic networks. In previous work, we developed a new routing algorithm, called AntHocNet, for these challenging network env...
144
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DAC
2004
ACM
15 years 8 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
145
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DAC
2005
ACM
15 years 6 months ago
2005
ACM
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...