Sciweavers

2852 search results - page 398 / 571
» High Performance Architectures and Compilers
Sort
View
ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
15 years 9 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram
DAMON
2006
Springer
15 years 8 months ago
Processing-in-memory technology for knowledge discovery algorithms
The goal of this work is to gain insight into whether processingin-memory (PIM) technology can be used to accelerate the performance of link discovery algorithms, which represent ...
Jafar Adibi, Tim Barrett, Spundun Bhatt, Hans Chal...
AC
2008
Springer
15 years 5 months ago
DARPA's HPCS Program- History, Models, Tools, Languages
The historical context surrounding the birth of the DARPA High Productivity Computing Systems (HPCS) program is important for understanding why federal government agencies launche...
Jack Dongarra, Robert Graybill, William Harrod, Ro...
IWCMC
2006
ACM
15 years 11 months ago
Detecting spatial congestion in multihop wireless networks
While TCP is highly successful in the wire-line Internet, its performance fast degrades as the number of hops increases in multihop wireless networks. It is due to not only the ha...
Changhee Joo, Saewoong Bahk, Hyogon Kim
ISPAN
2005
IEEE
15 years 10 months ago
An FPGA-Based Floating-Point Jacobi Iterative Solver
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...
Gerald R. Morris, Viktor K. Prasanna