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SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
16 years 16 days ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
ICC
2007
IEEE
246views Communications» more  ICC 2007»
16 years 14 days ago
AR-TP: An Adaptive and Responsive Transport Protocol for Wireless Mesh Networks
Abstract—Wireless meshing has been envisioned as the economically viable networking paradigm to build up broadband and large-scale wireless commodity networks. Several different ...
Vehbi Cagri Gungor, Pasquale Pace, Enrico Natalizi...
IPPS
2006
IEEE
16 years 5 days ago
Dual-layered file cache on cc-NUMA system
CC-NUMA is a widely adopted and deployed architecture of high performance computers. These machines are attractive for their transparent access to local and remote memory. However...
Zhou Yingchao, Meng Dan, Ma Jie
IEEECGIV
2005
IEEE
15 years 11 months ago
A Practical Implementation of a 3-D Game Engine
Creating a 3-D game engine is not a trivial task as gamers often demand for high quality output with top notch performance in games. In this paper, we show you how various real-ti...
Thomas C. S. Cheah, Kok-Why Ng
DISCEX
2003
IEEE
15 years 11 months ago
Interactions Between TCP and the IEEE 802.11 MAC Protocol
The IEEE 802.11x MAC protocol, the de facto standard for wireless LANs, includes a distributed coordination function (DCF) mode usable for ad hoc network architectures. The Transm...
Rui Jiang, Vikram Gupta, Chinya V. Ravishankar