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DATE
2005
IEEE
121views Hardware» more  DATE 2005»
15 years 3 months ago
C Compiler Retargeting Based on Instruction Semantics Models
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compil...
Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, ...
PDP
2009
IEEE
15 years 4 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
ARC
2006
Springer
154views Hardware» more  ARC 2006»
15 years 1 months ago
Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart P...
ICS
2009
Tsinghua U.
15 years 4 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
ERLANG
2004
ACM
15 years 3 months ago
HiPE on AMD64
Erlang is a concurrent functional language designed for developing large-scale, distributed, fault-tolerant systems. The primary implementation of the language is the Erlang/OTP s...
Daniel Luna, Mikael Pettersson, Konstantinos F. Sa...