Sciweavers

2852 search results - page 50 / 571
» High Performance Architectures and Compilers
Sort
View
CAMP
2000
IEEE
15 years 2 months ago
An FPGA Architecture for High Speed Edge and Corner Detection
This paper presents an FPGA based architecture for high speed edge and corner detection. Applications targeted are in high speed computer vision (i.e. more than 100 images per sec...
Cesar Torres-Huitzil, Miguel Arias-Estrada
EGH
2010
Springer
14 years 8 months ago
AnySL: efficient and portable shading for ray tracing
While a number of different shading languages have been developed, their efficient integration into an existing renderer is notoriously difficult, often boiling down to implementi...
Ralf Karrenberg, Dmitri Rubinstein, Philipp Slusal...
CEFP
2007
Springer
15 years 4 months ago
From Interpretation to Compilation
Abstract. In this paper we sketch some experiments with the construction of a simple compiler for a high level intermediate lazy functional language, with C++ as a target language....
Jan Martin Jansen, Pieter W. M. Koopman, Rinus Pla...
ISCAPDCS
2007
14 years 11 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
MICRO
1998
IEEE
98views Hardware» more  MICRO 1998»
15 years 2 months ago
Task Selection for a Multiscalar Processor
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
T. N. Vijaykumar, Gurindar S. Sohi