205 search results - page 11 / 41 » High Performance Array Processor for Video Decoding |
103
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ANCS
2009
ACM
14 years 9 months ago
2009
ACM
The problem of maintaining efficiently a large number (say millions) of statistics counters that need to be updated at very high speeds (e.g. 40 Gb/s) has received considerable re...
104
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MICRO
2003
IEEE
15 years 5 months ago
2003
IEEE
High-performance caches statically pull up the bitlines in all cache subarrays to optimize cache access latency. Unfortunately, such an architecture results in a significant wast...
113
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TCSV
2008
14 years 11 months ago
2008
The objective of dynamic voltage scaling (DVS) is to adapt the frequency and voltage for configurable platforms to obtain energy savings. DVS is especially attractive for video dec...
MM
2005
ACM
15 years 5 months ago
2005
ACM
Although pixel shaders were designed for the creation of programmable rendering effects, they can also be used as generic processing units for vector data. In this paper, attentio...
IPPS
2002
IEEE
15 years 4 months ago
2002
IEEE
Multipartitioning is a strategy for parallelizing computations that require solving 1D recurrences along each dimension of a multi-dimensional array. Previous techniques for multi...