Sciweavers

205 search results - page 30 / 41
» High Performance Array Processor for Video Decoding
Sort
View
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
14 years 10 months ago
Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem
— Applications like 4G baseband modem require single-chip implementation to meet the integration and power consumption requirements. These applications demand a high computing pe...
Camille Jalier, Didier Lattard, Ahmed Amine Jerray...
IPPS
1998
IEEE
15 years 4 months ago
Local Enumeration Techniques for Sparse Algorithms
Several methods have been proposed in the literature for the local enumeration of dense references for arrays distributed by the CYCLIC(k) data-distributionin High Performance For...
Gerardo Bandera, Pablo P. Trabado, Emilio L. Zapat...
ARC
2008
Springer
104views Hardware» more  ARC 2008»
15 years 1 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
CGF
2005
111views more  CGF 2005»
14 years 11 months ago
Pinchmaps: textures with customizable discontinuities
We introduce a new texture representation that combines standard sampling, to be bilinearly interpolated in smoothly varying regions, with customizable discontinuities, to model s...
Marco Tarini, Paolo Cignoni
CLUSTER
2006
IEEE
15 years 5 months ago
Cluster-based IP Router: Implementation and Evaluation
IP routers are now increasingly expected to do more than just traditional packet forwarding – they must be extensible as well as scalable. It is a challenge to design a router a...
Qinghua Ye, Mike H. MacGregor