12055 search results - page 112 / 2411 » High Performance Banking |
146
click to vote
DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
224
click to vote
LCN
1998
IEEE
15 years 8 months ago
1998
IEEE
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
114
click to vote
DSD
2004
IEEE
15 years 8 months ago
2004
IEEE
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
131
click to vote
ASPDAC
2008
ACM
15 years 6 months ago
2008
ACM
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
152
click to vote
CIDR
2003
15 years 5 months ago
2003
Peer-to-peer sharing systems are becoming increasingly popular and an exciting new class of innovative, internet-based data management systems. In these systems, users contribute ...