Sciweavers

12055 search results - page 159 / 2411
» High Performance Banking
Sort
View
ICMCS
2005
IEEE
104views Multimedia» more  ICMCS 2005»
15 years 10 months ago
A High-Performance Memory-Efficient Architecture of the Bit-Plane Coder in JPEG 2000
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
Grzegorz Pastuszak
IPPS
2005
IEEE
15 years 10 months ago
A High-Performance Framework for Sun-to-Earth Space Weather Modeling
The Space Weather Modeling Framework (SWMF) aims at providing software architecture for integrated modeling of different domains of Sun-Earth system and high-performance physics-b...
Ovsei Volberg, Tamas I. Gombosi, Kenneth G. Powell...
ISVLSI
2005
IEEE
97views VLSI» more  ISVLSI 2005»
15 years 10 months ago
A High Performance Hybrid Wave-Pipelined Multiplier
The clock period in conventional pipeline scheme is proportional to the maximum delay while in hybrid wave-pipelining it is proportional to the maximum delay difference. An 8×8-b...
Suryanarayana Tatapudi, José G. Delgado-Fri...
SBACPAD
2005
IEEE
87views Hardware» more  SBACPAD 2005»
15 years 10 months ago
High Performance Computing in Science and Engineering
Peter W. Haas, Michael M. Resch