12055 search results - page 209 / 2411 » High Performance Banking |
146
click to vote
MICRO
2010
IEEE
15 years 2 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
203
click to vote
HIPEAC
2011
Springer
14 years 4 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
132
click to vote
GLVLSI
2005
IEEE
15 years 10 months ago
2005
IEEE
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in ...
166
Voted
ISVLSI
2002
IEEE
15 years 10 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
143
click to vote
CVPR
1999
IEEE
16 years 7 months ago
1999
IEEE
We analyze the problem of detecting a road target in background clutter and investigate the amount of prior (i.e. target specific) knowledge needed to perform this search task. Th...