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125
Voted
ICCD
2003
IEEE
112views Hardware» more  ICCD 2003»
16 years 2 months ago
Power Efficient Data Cache Designs
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
Jaume Abella, Antonio González
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
15 years 9 months ago
MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
NIME
2004
Springer
100views Music» more  NIME 2004»
15 years 10 months ago
TOASTER and KROONDE: High-Resolution and High-Speed Real-time Sensor Interfaces
High capacity of transmission lines (Ethernet in particular) is much higher than what imposed by MIDI today. So it is possible to use capturing interfaces with high-speed and high...
Thierry Coduys, Cyrille Henry, Arshia Cont
129
Voted
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
15 years 9 months ago
A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems
This paper describes a high performance CMOS differential input front-end, designed for optical wireless communications. The front-end achieves a 50 MHz bandwidth and a 400 K tran...
E. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dini...
INFOCOM
2012
IEEE
13 years 7 months ago
Experimental performance comparison of Byzantine Fault-Tolerant protocols for data centers
Abstract—In this paper, we implement and evaluate three different Byzantine Fault-Tolerant (BFT) state machine replication protocols for data centers: (1) BASIC: The classic solu...
Guanfeng Liang, Benjamin Sommer, Nitin H. Vaidya